The invention relates to an integrated circuit comprising a multi-collector I.sup.2 L gate and a transistor for internal injection logic (I.sup.2 L) with a single collector output region and at least one base contact arranged between the collector output region and an injector, the surface area of the collector output region being several times larger than that of a collector of a logic multi-collector I.sup.2 L gate.
Transistors of the above type capable of operating with a comparatively high output current are frequently used, especially for being mounted in cascade arrangement at the output of a logic I.sup.2 L gate so that it constitutes an interface circuit with other elements.
In such transistors of high current level, the voltage drop in the base is larger than in a logic I.sup.2 L gate, which results in that the output current is considerably smaller than could be expected from the ratio between the surface area of the single collector output of the transistor and that of a collector of the logic gate.
Prior art U.S. Pat. Nos. 4,512,075 and 4,322,882 disclose I.sup.2 L transistors, in which the base resistance is reduced due to the presence of a base contact extending throughout the surface of the base. However it has been found that such a provision has the disadvantage of increasing the phenomena of recombination in the base and of resulting in a reduction of the gain, which is particularly unfavourable in the case of transistors operating at a high current and hence having larger dimensions. Also see U.S. Pat. Nos. 4,075,039 and 4,546,539.